Samsung and ASML Expand High-NA EUV Work for Future DRAM and 12-Inch Photomasks

Samsung Electronics and ASML announced an expanded strategic collaboration on September 8, 2026 focused on High Numerical Aperture extreme ultraviolet lithography and supporting manufacturing technology. The two concrete items are separate but related: Samsung says it plans to introduce ASML High-NA EUV into future DRAM high-volume manufacturing by 2028, and Samsung is joining the industry effort to develop a larger 12-inch photomask platform for High-NA EUV.

Those are roadmap commitments, not evidence that Samsung is already mass-producing DRAM with High-NA EUV. Samsung did not disclose a production yield, a measured cost reduction, a specific future DRAM process node, or a retail-memory launch tied to the announcement. The useful way to read the news is therefore as a manufacturing-direction signal with explicit target dates, not as proof that the promised production economics have already been achieved.

ASML’s current EXE platform is its High-NA generation of EUV lithography. The company increases projection-system numerical aperture from 0.33 on its NXE EUV platform to 0.55 on EXE. In lithography, higher numerical aperture allows a smaller printable feature for the same exposure wavelength, which is why High-NA is intended to extend geometric scaling beyond the practical reach of today’s 0.33-NA EUV systems.

ASML states that its EXE:5000 can reach 8 nm resolution and can print, in a single exposure, features 1.7 times smaller than its NXE systems. ASML also says that can correspond to 2.9 times higher transistor density and can reduce the need for multiple patterning. Those figures are manufacturer technical claims about the tool platform; they are not independent Core Tech Tips measurements and they do not directly translate into an equivalent DRAM-density or cost gain for a future Samsung product.

High-NA EUV uses larger anamorphic projection optics. ASML explains that this lets the EXE platform retain traditionally sized reticles, but the anamorphic design exposes a field that is half the size of the field used by the 0.33-NA NXE platform. For designs that exceed that half-field, manufacturers can need stitching: exposing adjacent fields that together form the intended larger pattern.

That is the connection between High-NA EUV and the new photomask initiative. The larger-mask effort is not being presented as a prerequisite for every early High-NA layer. ASML and its partners are instead describing a transition in which High-NA can begin with current 6-inch masks while the ecosystem develops a larger mask format intended to remove some of the field-size and stitching constraints later.

Samsung says the semiconductor industry has relied on the 6-inch photomask format for decades and that it will join the industry initiative to advance 12-inch photomasks. In a parallel September 8 announcement, ASML and TSMC said their collaborative initiative targets a 12-inch mask pilot line by 2031 and full lithography-system readiness for advanced-node production by 2033. That timeline makes clear that the larger-mask ecosystem is still development work rather than an immediately deployable manufacturing standard.

Samsung and the initiative describe larger masks as a way to increase scanner productivity, lower chipmaking costs and remove stitching constraints. Those are expected benefits stated by the participating companies. They should not be read as measured savings already demonstrated in Samsung DRAM production, because the supporting mask infrastructure, standards and production equipment are still being developed toward later milestones.

The dates matter. Samsung’s stated target is to bring High-NA EUV into future DRAM high-volume manufacturing by 2028, while the ASML-TSMC large-mask initiative targets a pilot line in 2031 and full advanced-node lithography-system readiness in 2033. That means Samsung’s 2028 DRAM plan cannot simply be treated as synonymous with a mature 12-inch-mask production flow.

A reasonable interpretation is that early High-NA DRAM adoption can proceed with the existing mask ecosystem and the current EXE optical approach, while larger photomasks are a later attempt to improve how the technology handles field size and productivity. That sequencing is consistent with ASML’s description of High-NA adoption progressing first with current 6-inch masks and later being further supported by 12-inch masks.

There is useful evidence that High-NA EUV itself has moved beyond a pure research-tool phase. Intel Foundry and ASML said on September 7, 2026 that Intel had processed more than one million wafers across tool certification, research and development, and volume production, with High-NA used on select layers for a subset of Intel Core Ultra Series 3 processors. That demonstrates real production exposure for the technology in logic manufacturing.

It does not prove that Samsung can achieve its 2028 DRAM target on schedule. DRAM has different layouts, process integration, yield constraints and cost targets from Intel logic products. The Intel result is therefore evidence that the scanner platform has entered real manufacturing use, while Samsung’s future DRAM integration remains a separate roadmap that still has to be executed.

For DRAM, the strategic value is straightforward: finer patterning can help extend geometric scaling as conventional patterning becomes more complex. If High-NA can replace some multi-patterning steps with fewer exposures, manufacturers may reduce process complexity and cycle time. Larger masks are aimed at another part of the same problem by improving usable exposure-field economics as the industry pushes High-NA into broader production.

The announcement does not justify a forecast for consumer RAM prices, HBM availability, future DIMM capacities, or a specific Samsung memory-product launch. Those outcomes depend on far more than lithography, including process yield, die design, packaging, fab capacity, product mix and market demand. For now, the confirmed development is narrower but still important: Samsung has put a 2028 date on planned High-NA DRAM high-volume manufacturing and joined the industry effort to build the larger-mask ecosystem intended to support High-NA at scale later in the decade and beyond.