DDR bandwidth utility
Calculate theoretical peak DDR memory bandwidth from transfer rate, bus width per channel, and active channel count. The result is an interface ceiling, not a RAM benchmark or application-performance estimate.
Interactive calculation
Use the effective DDR transfer rate, data-bus width per channel, and number of active memory channels. The defaults are only a worked example.
Channel count is not DIMM count. Two DIMMs can occupy two channels, but two DIMMs can also share one channel on platforms with multiple DIMMs per channel. Use the memory-controller topology actually active on the system.
Theoretical peak bandwidth
96 GB/s
Decimal GB/s interface ceiling, not measured sustained throughput.
Formula
MT/s means millions of transfers per second. Multiply that transfer rate by the number of bytes carried per transfer on one channel, then by the number of active channels. A 64-bit channel carries 8 bytes per transfer.
For example, 6000 MT/s × 8 bytes × 2 channels = 96,000 MB/s, or 96 GB/s using decimal SI units. Kingston independently lists DDR5-6400 as 51.2 GB/s for one 64-bit module path and 102.4 GB/s for a dual-channel configuration, which follows the same relationship.
Interpretation
The calculation describes the theoretical payload rate implied by the entered interface. Real software can sustain less because useful transfers depend on memory-controller scheduling, access patterns, command overhead, bank/rank behavior, CPU architecture, contention, and workload characteristics.
Bandwidth also does not replace latency. CAS timing, complete memory-access latency, and throughput describe different properties. Use the separate DDR Memory Latency Calculator when the question is how many nanoseconds a CL timing represents.
References
Current manufacturer documentation is used to verify DDR transfer-rate terminology, 64-bit module data width, channel topology, and concrete MT/s-to-GB/s examples. These sources do not imply measured application throughput.
01 · Kingston Technology
DDR4 and DDR5 performance, channel width, and bandwidth examples02 · Kingston Technology
Memory population rules and per-module transfer-rate examplesRelated
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