CPU database reference
Verified catalog recordIBM Telum II (z17)
IBM · IBM Telum II (z17)
IBM Telum II (z17) processor reference with normalized architecture, compute, clocks, cache, memory, PCIe, power, and platform specifications.
- Cores / threads
- 8 / 16
- Socket
- Multi-chip module (DCM)
Technical data
Specifications
Only fields backed by the current normalized record are rendered; missing values stay absent rather than becoming N/A grids.
Overview
| Manufacturer | IBM |
|---|---|
| Launch date | 2025-06-17 |
| Market segment | server |
Architecture
| Architecture | z/Architecture (Telum II, z17) |
|---|---|
| CPU process | Samsung 5nm EUV |
Compute
| Cores | 8 |
|---|---|
| Threads | 16 |
Clocks
| Base clock | 5.50 GHz |
|---|
Cache
| L3 cache | 360 MB |
|---|
Memory
| Memory support | DDR5 ECC RAIM, 2nd-gen on-chip AI accelerator |
|---|
Platform
| Socket | Multi-chip module (DCM) |
|---|
Sources
Specification provenance
No public source record is available.
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