CPU database reference
Verified catalog recordIBM POWER2 Super Chip (P2SC)
IBM · IBM POWER2 Super Chip (P2SC)
IBM POWER2 Super Chip (P2SC) processor reference with normalized architecture, compute, clocks, cache, memory, PCIe, power, and platform specifications.
- Cores / threads
- 1 / 1
- Socket
- Single-chip module
- Default TDP
- 30 W
Technical data
Specifications
Only fields backed by the current normalized record are rendered; missing values stay absent rather than becoming N/A grids.
Overview
| Manufacturer | IBM |
|---|---|
| Launch date | 1996-10-08 |
| Market segment | server |
Architecture
| Architecture | POWER2 |
|---|---|
| CPU process | IBM 290nm CMOS |
Compute
| Cores | 1 |
|---|---|
| Threads | 1 |
Clocks
| Base clock | 0.16 GHz |
|---|
Memory
| Memory support | Custom DDR |
|---|
Power
| Default TDP | 30 W |
|---|
Platform
| Socket | Single-chip module |
|---|
Sources
Specification provenance
No public source record is available.
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Hardware reference
IBM POWER2 specifications
IBM POWER2 CPU specifications: POWER2, Multi-chip module, 1 cores/1 threads.