SSD SLC Cache Explained: TLC, QLC, Dynamic Cache, Sustained Write Speed, and Why Performance Drops

SLC means single-level cell and stores one bit per cell. TLC stores three bits per cell, while QLC stores four. More bits per cell increase storage density, but they also require the controller and NAND to distinguish more charge states. Kioxia defines SLC, TLC, and QLC as one, three, and four bits per cell respectively; Micron likewise describes TLC and QLC as higher-density NAND families with different performance and endurance characteristics.

A consumer SSD advertised as TLC or QLC normally uses that higher-bit-per-cell NAND as its primary storage. An SLC cache does not necessarily mean the drive contains a separate pool of native SLC NAND. Many SSDs temporarily operate part of their TLC or QLC NAND in an SLC-like mode so incoming writes can be accepted more quickly.

Samsung describes Intelligent TurboWrite as internal SLC buffering: incoming data is written to an SLC buffering area rather than directly to the TLC or QLC multi-bit state, then moved into the multi-bit storage region when the SSD is idle. Micron describes a newer variation in its 2600 QLC SSD, where Adaptive Write Technology can dynamically use SLC, TLC, and QLC write modes while the underlying NAND remains QLC.

The important distinction is between native cell capability and temporary write mode. Operating higher-density NAND as one bit per cell sacrifices usable capacity in that region while it is in SLC mode, but reduces the number of charge states that must be programmed for the incoming data. The controller later has to fold or migrate that data into its normal multi-bit representation to reclaim cache space.

A short benchmark or file copy may fit entirely inside the available SLC-mode region. If writes continue faster than cached data can be folded into the primary TLC or QLC state, the available cache can eventually fill and the SSD must rely more heavily on its native sustained-write path. Samsung explicitly documents this behavior for TurboWrite and publishes product-specific post-TurboWrite write rates on some SSD families.

This is why one headline sequential-write number cannot describe every transfer length. The size of the cache, the speed after cache exhaustion, and the transition between states are drive-specific. They can also differ by capacity within one product family. Do not apply a post-cache number from one Samsung, Micron, or other SSD to a different model simply because both use TLC or QLC NAND.

A fixed or static SLC region reserves a defined amount of NAND for SLC-mode buffering. A dynamic design can vary how much NAND is temporarily used as cache according to available space and controller policy. Some products combine a fixed region with an additional dynamic region. Samsung’s 860 QVO documentation, for example, separated a default TurboWrite region from an additional Intelligent region whose size depended on drive capacity.

Those terms do not define one industry-wide algorithm. Firmware can decide when and how to allocate, fold, or recover cache differently across products. Micron’s current Adaptive Write Technology goes further by selecting among SLC, TLC, and QLC modes. Treat “dynamic SLC cache” as a description of a strategy, then use the exact product documentation or controlled measurements to learn how a particular SSD implements it.

A dynamic cache needs NAND capacity that can temporarily be used in its faster mode. Samsung states for the 870 QVO that Intelligent TurboWrite adjusts buffer size within usable disk space. That makes free-space state relevant on that documented family, but it does not justify inventing a universal percentage of free space that every SSD needs.

Cache recovery also takes work. Samsung explains that buffered data is moved to multi-bit cells when the SSD is not reading or writing, freeing the SLC buffering area. A drive hit by repeated back-to-back writes may therefore begin a later workload in a different state than a rested drive. Garbage collection, wear management, firmware policy, spare area, and concurrent I/O can further affect what the controller is able to do in the background.

A write-rate drop during a long transfer is not automatically proof that SLC cache was exhausted. SSD controllers can reduce performance for thermal management, and different capacities can expose different levels of NAND parallelism or cache allocation. Firmware, NAND generation, controller design, over-provisioning, current free space, and the exact workload all belong in the test record.

Separate correlated evidence before assigning a cause. If throughput changes at the same point that a documented cache region is exceeded, cache state is plausible. If temperature rises into a device-specific management condition, thermal throttling may be involved. If the drive negotiates a slower PCIe link, the transport itself may cap throughput. More than one limit can exist in the same test.

A small synthetic test can be useful for checking burst behavior, but it may never leave the fast cache state. A larger sequential workload can reveal sustained behavior after the cache changes state, while random workloads stress different controller and NAND paths. Queue depth, block size, data pattern, test-file size, drive fill state, preconditioning, temperature, and idle time can all change what a benchmark actually measures.

Host-side caching is a separate layer. Operating-system RAM caches or software acceleration can make a result describe more than the SSD itself, while an SSD’s pseudo-SLC cache lives inside the drive’s NAND-management path. When comparing results, match the benchmark settings and cache policy and distinguish the host cache from the drive’s internal write buffer.

For a useful SSD comparison, ask what NAND type is used, whether the manufacturer documents an SLC-style write cache, whether that cache is fixed or variable, how the exact capacity behaves, and whether a published write figure applies only while caching is active. Then look for sustained-write evidence produced under a defined workload rather than assuming the largest product-page number persists indefinitely.

The practical model is simple: an SSD can have multiple legitimate write-performance states. Pseudo-SLC caching is one reason the first part of a transfer can be faster than a long uninterrupted write, but it is not the only reason performance changes. PCIe link limits, thermal management, firmware, free space, background maintenance, benchmark design, and workload shape must be separated before drawing a conclusion about the drive.