Technical guide
Page Faults Explained: Hard vs Soft Faults, Virtual Memory, and Disk I/O
Understand page faults in Windows and modern CPUs, including hard vs soft faults, demand paging, working sets, disk I/O, protection faults, and why page faults are not automatically a RAM problem.
On this page
- A page fault means an address needs operating-system attention
- Hard and soft faults describe how Windows resolves a missing working-set page
- A hard fault does not necessarily mean Windows read pagefile.sys
- The CPU can raise a page fault for missing translations or permission violations
- A TLB miss and a page fault are different events
- High page-fault counts alone do not prove that a PC needs more RAM
- Working sets are dynamic, so residency changes over time
- Use page faults as evidence, not as a standalone performance verdict
A page fault means an address needs operating-system attention
Virtual memory lets a process use virtual addresses while the processor and operating system maintain the mappings that ultimately lead to physical memory or another valid backing source. A page fault occurs when an attempted memory access cannot simply continue under the current paging state and control has to pass to the operating system's fault handler.
That name sounds like hardware failure, but many page faults are normal. Operating systems deliberately use faults to implement demand paging, copy-on-write and other memory-management behavior. The important question is why the fault occurred and what the operating system had to do to resolve it.
| Event | What happened | Disk read required? |
|---|---|---|
| Soft page fault | The needed page can be resolved without reading its backing store, such as a page already resident elsewhere in memory or a demand-zero page | No |
| Hard page fault | The page contents must be read from backing storage such as the paging file or a memory-mapped file | Yes |
| Protection-related page fault | The processor detected an access that violates the current page permissions or paging rules | Not inherently |
| TLB miss | The CPU lacks a cached address translation and may perform a page-table walk | No; this is not itself a page fault |
Hard and soft faults describe how Windows resolves a missing working-set page
Microsoft defines a process working set as the pageable virtual-memory pages currently resident in physical memory for that process. When a process references pageable memory that is not currently in its working set, Windows handles a page fault and, when resolution succeeds, can add the page to the working set.
A soft fault can be resolved without reading the page's backing store. Microsoft gives examples including a page already resident for another process, a page in transition, and a first reference to an allocated virtual page that can be satisfied as demand-zero memory. A hard fault instead requires reading page contents from backing storage.
A hard fault does not necessarily mean Windows read pagefile.sys
The phrase hard fault is often simplified to 'Windows had to read the page file,' but that is too narrow. Microsoft states that the backing store for a hard fault can be the system paging file or a memory-mapped file created by the process. Executable code and mapped data can therefore participate in hard-fault activity without the requested bytes necessarily coming from pagefile.sys.
The practical cost is the storage access. A hard fault introduces I/O that a soft fault does not need, so sustained hard-fault activity can become visible as stalls when the workload repeatedly waits for pages to become resident. The impact depends on access pattern, storage behavior, memory pressure and whether useful work can proceed in parallel.
The CPU can raise a page fault for missing translations or permission violations
At the processor level, an x86 page-fault exception is broader than Windows' hard-versus-soft performance terminology. Intel documents page faults when address translation has no usable present mapping and when a translation exists but the attempted access violates paging permissions, along with other paging-rule violations.
The processor supplies information describing the faulting access so the operating system can decide what to do. A recoverable not-present condition may let the OS establish or restore the mapping and retry the instruction. An invalid or forbidden access can instead become an application-visible exception or termination. The same CPU exception mechanism therefore supports both ordinary virtual-memory work and genuine software faults.
A TLB miss and a page fault are different events
A translation lookaside buffer caches recently useful virtual-to-physical translations. If the required translation is absent from the TLB, the processor can walk the page tables to find a valid mapping that already exists. That is a TLB miss and page-table walk, not automatically a page fault.
A page fault occurs when translation or access cannot proceed normally under the paging state and the operating system must handle the condition. Keeping those events separate matters in performance analysis: translation-cache pressure, ordinary soft faults and storage-backed hard faults can have very different costs and fixes.
High page-fault counts alone do not prove that a PC needs more RAM
Because normal demand-zero and other soft faults contribute to page-fault activity, a high aggregate fault count is not sufficient evidence of memory shortage. Microsoft explicitly distinguishes hard faults that require backing-store reads from soft faults that can be resolved without that I/O.
When diagnosing Windows memory pressure, correlate fault activity with hard-fault or page-read evidence, available memory, process working sets and the workload's actual responsiveness. A burst of soft faults during application startup can be expected behavior; sustained storage-backed faults under memory pressure are a different signal.
Working sets are dynamic, so residency changes over time
A process does not permanently own every physical page it has touched. Windows can trim pages from working sets to make memory available, while pages may remain resident elsewhere or later need to be read again from backing storage. That is why the same virtual address can be cheap to access at one moment and fault later after residency changes.
This dynamic model is one reason virtual-memory statistics need context. Committed virtual memory, working-set residency, physical RAM usage, page-file commitment and storage-backed fault traffic describe related but different layers. Treating any single counter as a complete diagnosis can lead to the wrong conclusion.
Use page faults as evidence, not as a standalone performance verdict
For application or PC troubleshooting, first separate soft from hard activity and determine whether the faults correlate with the slowdown being investigated. Then identify which process is faulting, whether storage reads are involved, and whether the system is under real memory pressure.
Page faults are a mechanism, not a benchmark score. A system can record many inexpensive faults while remaining responsive, while a smaller number of latency-sensitive hard faults can matter to a particular workload. The useful diagnosis comes from the type, source, timing and observed effect of the faults rather than the raw counter alone.
Sources
Primary and technical sources
Technical details can vary by exact model, firmware, and platform. These are the sources used for the factual claims in this article.
Related
Continue from here
Useful next steps selected from the same technical reference and publication system.
Technical guide
Windows Page File Explained: Virtual Memory and Commit Limit
Understand what the Windows page file does, how it extends the system commit limit, how paging differs from RAM use, and why crash dumps can depend on it.
Tool
DDR Memory Latency Calculator
Convert DDR data rate and CAS latency cycles into CAS timing in nanoseconds.
Technical guide
CPU Out-of-Order Execution Explained: Dependencies, Scheduling, Reorder Buffers, and Retirement
Learn how modern CPUs find instruction-level parallelism, rename registers, schedule ready work out of order, and still retire results in program order.
Tool
DDR Memory Bandwidth Calculator
Calculate theoretical peak DDR memory bandwidth from transfer rate, bus width per channel, and active channel count.